Engr Sr Prin, Ip Software_Tl

Engr Sr Prin, Ip Software_Tl

On Semiconductor

Engr Sr Prin, Ip Software_Tl

Details of the offer


The System Solutions Enablement teamis looking for key talent to support our mission of enabling customers withsystem intellectual property (IP) solutions. This mission includes design andvalidation of re-usable, logically complex or performance critical IP thatrequires system level consideration when integrating into an ASIC. The teamplays a key role in selecting, acquiring, designing, verifying and integratingintellectual property with a special focus towards reuse and quality.

As a senior verification engineer, your responsibilities will include:
- Architect logically complex digital verificationenvironments

- Developing SystemVerilog/UVMtestbenches for block and SoC level functional verification

- Developing detailed verificationplans for block/SoC

- Debugging and correcting functionalerrors in the RTL, using simulation tools, debug tools, and programming skills

- Defining and implementing functionalcoverage, and enhancing the testbench to ensure coverage closure

- Documenting test plans and testbenchdesign

- Lead project teams and mentor juniorteam members.

- BS degree in Electrical Engineeringor related field

- At least 7+ years of digital verificationexperience

- Expert knowledge of Verilog orSystem Verilog

- Experience with verificationmethodologies e.g. UVM

- Experience with scripting languagelike Python/Perl

- Excellent English written and verbalcommunication skills!

- Self-motivated with the ability towork independently and interface effectively with team members in a remotelocation

- Optional (Plus):

MS degree in Electrical Engineeringor related field

Experience with high-speed interfaces, such asDDR, PCIe or MIPI

Source: Bebee2



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