Pre-Si Solution And Validation Staff Engineer

Job Description

This engineer position is part of the Malaysia Design Center (MDC) under Intel Validation Engineering (iVE) organization in Malaysia. Responsibilities includes developing capabilities in Emulation/FPGA environment, and validation of Intel silicon in pre-silicon and post-silicon, including test plan, test content development, execution of validation test and debugging system failure. The focus of this team will be Intel silicon on data centre and discrete graphics products, covering features in system security, memory, power management, and high speed IO.
The successful candidate must be able to work effectively with cross functional teams such as Silicon Design, and FW/SW development team. You also need to coach /mentor the team on technical challenge, and leading task force across teams/groups/functions. Requires broad understanding of multiple system architecture, silicon design/validation methodologies, and Emulation/FPGA technologies.

Qualifications

Bachelors or Master Degree in Computer Science/Electrical/Electronic Engineering with 10++ years of technical experience.

Knowledge in C/C++, System Verilog, and Python is desirable. Intel Architecture knowledge of system security, memory, power management and high speed IO is a plus.

Good understanding of silicon design, system architecture, and FW/SW flow.

Experience in silicon debug, RTL validation, SW validation, or Power/Perf validation is a plus.

Experience in Emulation, Virtual Platform, Altera/Xilinx/Synopsys/Mentor/Cadence Tools Flow, HAPS is a plus.

Should have strong communication, analytical skill and a good team player.