Software Engineer / Software Developer (Virtual Platform)

Job Description:Developing models (IPs) using System C , specifically for server and client segmentsÂGood Hands on experience in System C, C/C++ languageWorking knowledge on different software components and layers such as BIOS and firmwareKnowledge of Verilog , system Verilog.Good knowledge of highspeed IOs is a plusHands on experience in scripting using Python , perl etcSkillset:ÂSimics, System C Modelling , C/C++ Modeling of any Hardware IPsFrom Scripting – PYTHON, PerlHighspeed IOs – PCIe, DDR , USBOther Language Skills – Verilog, System Verilog,Verification Methodologies (Optional )

- UVM, OVMEmulation requirements:Model development experience using System Verilog. good design knowledge is a must.Emulation knowledge is required , it can be either Zebu or Veloce or Palladium.Hands on experience in hardware description knowledge Verilog, system Verilog,Candidates should have good Validation knowledgeGood knowledge of scripts like Perl, Python.knowledge of Synopsys VCS, Verdi knowledge is a mustGood knowledge of highspeed IOs is a plusSkillset: Zebu, Veloce, Palladium or FPGA (Xilinx or Altera)Language Skills

- System Verilog, VerilogFrom Scripting – PYTHON, Perl, ShellHighspeed IOs – PCIe, DDR, USBVerification Methodologies

- UVM, OVM